About the role
This role is for a Technical Manager in NPU Physical Design, requiring 8-12 years of experience. The manager will lead a team through all stages of physical design from synthesis to signoff, manage project execution, and collaborate with cross-functional teams.
FablessOnsiteChip Design
Key Responsibilities
- Lead and perform tasks in RTL synthesis, floorplanning, placement, clock tree synthesis, routing, and physical verification.
- Manage signoff activities including Static Timing Analysis (STA), EMIR, and Physical Verification (PV) to ensure tapeout-quality designs.
- Collaborate with cross-functional teams (DFT, RTL, STA, Packaging) to drive seamless integration and execution.
- Plan, monitor, and execute project execution, set deadlines, track milestones, and report progress to leadership.
- Guide, mentor, and develop the team, fostering technical excellence and a collaborative environment.
- Troubleshoot and resolve design challenges, proactively communicating risks and mitigation strategies.
- Interface with EDA vendors and keep up-to-date with industry trends, tools, and methodologies.
- Prepare and deliver technical presentations, document processes, and contribute to organizational knowledge base.
Requirements
- 8–12 years of industry experience in physical design.
- Deep technical expertise in all stages of the physical design flow—including synthesis, PNR, and signoff activities (STA, EMIR, and PV).
- Strong leadership and project management abilities.
- Ability to successfully guide a team of engineers through complex project executions.