About the role
Analog Layout Design Engineer – SerDes is a active Engineering role at AMD in Singapore, Singapore. Open the role to review the official description and apply on the company site.
FablessOnsiteEngineering
Key Responsibilities
- Layout design of high speed and high performance SerDes analog mixed signal circuit in accordance to project requirements and specifications.
- Block level physical implementation which includes floor-planning, power distribution network, clock and signal routing, analog and mixed signal transistor level layout.
- Participate in post-layout circuit performance analysis.
- Participate in block / IP / chip level integration activities.
- Estimate realistic schedule, track and report clear progress and status.
- Strong participation in defining layout methodology and flow.
- Driving layout productivity improvement initiatives (i.e., pcell development and automation).
- Other responsibilities which include supervision of layout resources (onsite and offsite), assessing and correcting layout quality issues, and providing feedback to design teams.
Requirements
- Benefits offered are described: AMD benefits at a glance .
- AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
- This posting is for an existing vacancy.