About the role
Principal Analog IC Designer at Marvell leading a team to develop high‑performance CMOS transceiver, SERDES, PLL, and related analog IP, overseeing architecture, implementation, verification, and production delivery.
FablessOnsite
Key Responsibilities
- Lead a team of analog design engineers
- Interface with layout, verification, and application teams
- Manage delivery of analog IP from concept to production
- Perform architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs
- Conduct design verification using SPICE, Spectre, MATLAB and other industry‑standard tools
- Oversee system‑level pre‑tape‑out analog validation
Requirements
- Master's or PhD in Electrical Engineering or related field
- 6+ years of analog IC design experience
- Experience with PLL, data converters, oscillators, and high‑speed SerDes design (including 112G+ speeds)
- Familiarity with single‑ended high‑density parallel interfaces such as UCIe, DDR5/LPDDR5, GDDR6/LPDDR6
- Proficiency with analog design and verification tools (Virtuoso, Spectre, ADE, post‑layout extraction)
- Knowledge of signal integrity improvement, noise reduction, and multi‑GHz low‑jitter clock generation/distribution