About the role
The Staff Engineer, Analog IC Design at Marvell will lead high‑speed analog SerDes development in advanced technology nodes, collaborate on architecture with DSP, analog and digital teams, guide layout engineers, and work on IP characterization, validation, and silicon bring‑up.
FablessOnsite
Key Responsibilities
- Work on high‑speed and high‑performance Analog SerDes development in advanced technology nodes (5nm, 3nm, 2nm and beyond).
- Participate in SerDes architecture development with DSP, analog, and digital design teams.
- Provide instructions to layout engineers for analog designs.
- Collaborate with application engineers for IP characterization and validation.
- Contribute to system‑level pre‑tape‑out analog validation and silicon bring‑up/debugging efforts.
Requirements
- PhD in Electrical Engineering or related field.
- Strong analog design fundamentals with experience designing PLLs, data converters, oscillators, and high‑speed SerDes blocks (CTLE, FFE, DFE, CDR, PLL, line driver, etc.).
- Proficiency with analog design and verification tools such as Virtuoso, Spectre, ADE, and post‑layout extraction tools.
- Knowledge of signal integrity improvement, noise reduction, and multi‑GHz low‑jitter clock generation/distribution.
- Understanding of analog layout optimization for high‑speed designs.
- Strong communication and documentation skills.