About the role
The Principal Hardware Design Engineer will define system architecture for high‑speed PAM platforms, lead SI/PI strategies, and drive system‑level modeling and validation. The role provides technical leadership across hardware, package, and system engineering, and collaborates with customers and vendors on advanced design topics.
FablessOnsite
Key Responsibilities
- Define system architecture for 224G and 448G PAM platforms across package, PCB, and interconnect domains
- Lead end-to-end Signal Integrity (SI) and Power Integrity (PI) strategy to meet performance targets
- Drive system-level modeling using IEEE COM and SystemVue-based analysis
- Establish and standardize correlation flows between simulation and lab measurements
- Provide technical leadership across hardware, SI, package, and system engineering functions
- Lead complex system-level debugging, root-c
Requirements
- Expertise in high-speed signal and power integrity
- Experience with advanced semiconductor domains
- Technical leadership in hardware/system engineering