About the role
Staff Analog Layout Engineer at Marvell, responsible for analog circuit layout, simulation, verification, and collaboration with global design teams.
FablessOnsite
Key Responsibilities
- Run simulations and verifications using Cadence Virtuoso
- Collaborate closely with designers to refine and debug layouts
- Participate in routine meetings as a technical mentor and layout team member
- Provide status updates and present issues/solutions to global teams
- Own the full development cycle from floorplan to layout, verification, delivery, and support
Requirements
- Degree in Electrical Engineering (undergraduate or graduate)
- Experience delivering high‑speed or precision analog circuits across multiple process nodes
- Proficiency with CAD tools for layout and implementation layers
- Ability to own full development cycle including floorplanning, layout, verification, and delivery
- Strong communication skills for presenting to global teams and sharing information