All Jobs/Senior / Staff Layout Engineer (CAD & APR Automation)
MediaTek
MediaTek

Senior / Staff Layout Engineer (CAD & APR Automation)

Chip Design

Location

Singapore

Department

Chip Design

Posted

2 weeks before

Full Job Description

[Role Overview] We are seeking a highly skilled Layout Engineer with exceptional CAD capabilities to join our Custom Layout engineering team. This role combines hands-on APR layout implementation with advanced CAD automation expertise, empowering you to execute layout designs while revolutionizing productivity through workflow automation and methodology innovation. APR Layout Implementation: - Execute full-cycle APR layout using Innovus, ICC2, or Fusion Compiler for Foundation IP, Analog IP, RFIC, and digital blocks - Serve as DRI for layout automation flows including APR implementation, physical verification, and sign-off - Perform floorplanning, power mesh planning, critical block placement, and hierarchical layout construction - Optimize layouts for Power, Performance, and Area (PPA) through iterative refinement CAD Layout Support & Automation - Provide centralized CAD layout support to Foundation IP, Analog/RF, and SoC teams across multiple projects - Create, maintain, and enhance automated layout workflows from development through production deployment - Develop scripting utilities using Python, Tcl, SKILL, Perl to automate tasks and streamline processes - Build scalable CAD infrastructure including parameterized cells (p-cells), reusable templates, and modular architectures Incorporate AI and Agentic AI technologies into layout workflows to boost productivity - Establish standardized CAD procedures and best practices across diverse project executions - Process Node Expertise & Verification - Apply backend layout knowledge across planar, FinFet, and GAA process nodes from leading foundries - Master complex DRMs, DFM requirements, and physical verification flows for advanced technologies - Conduct physical verification (DRC/LVS/ERC/ANT/PERC) with expert-level debugging - Ensure layout compliance with EM/IR, SI/PI, and ESD integrity requirements - Create new flows or methodologies to boost team productivity #LI-WC1