About the role
The Staff PMIC Design Engineer at Qualcomm designs, verifies, and delivers high‑performance power management and mixed‑signal ICs for mobile, automotive, compute, wearable, and XR platforms, owning complex IP blocks from concept through silicon validation.
FablessOnsiteASICS Engineering
Key Responsibilities
- Design and verify analog, mixed‑signal, and power management circuits for PMIC products
- Own circuit blocks such as LDOs, buck/boost DC‑DC converters, battery chargers, precision voltage and current references, PLLs, ADCs/DACs, and analog front‑ends
- Develop circuit architectures, specifications, and transistor‑level implementations
- Perform design simulation, analysis, and optimization for performance, power, and robustness
- Drive designs through layout collaboration, LVS/DRC, and silicon tapeout
- Participate in post‑silicon validation and characterization, including debug and correlation
Requirements
- PhD in Electrical Engineering with 4+ years of experience, or Master's degree with 6+ years, or Bachelor's degree with 8+ years of experience in analog, mixed‑signal, or power management IC design
- Demonstrated experience with PMIC or mixed‑signal circuit tapeout
- Solid understanding of power electronics, control theory, and device reliability
- Proficiency with industry‑standard design tools such as Cadence (ADE, Virtuoso), SPICE, MATLAB, Verilog/Verilog‑AMS, VHDL
- Strong analytical, debugging, and problem‑solving skills
- Clear written and verbal communication skills