Staff Analog Mixed Signal Circuit Design Engineer, SERDES

<strong class="jdheading"></strong><br><br><p style="margin: 0px; padding: 0px; color: windowtext;"><strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">WHAT YOU DO AT AMD CHANGES EVERYTHING</span></span></strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-ccp-props="{}">&nbsp;</span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">At AMD, our mission is to build great products that accelerate next-generation computing experiences&mdash;from AI and data centers, to PCs, </span><span style="margin: 0px; padding: 0px;">gaming</span><span style="margin: 0px; padding: 0px;"> and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human </span><span style="margin: 0px; padding: 0px; border-bottom: 1px solid transparent;">ingenuity</span><span style="margin: 0px; padding: 0px;"> and a shared passion to create something extraordinary. When you join AMD, </span><span style="margin: 0px; padding: 0px;">you&rsquo;ll</span><span style="margin: 0px; padding: 0px;"> discover the real differentiator is our culture. We push the limits of innovation to solve the world&rsquo;s most important challenges&mdash;striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.</span><span style="margin: 0px; padding: 0px;"> &nbsp;</span></span><strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">Together, we advance your career.&nbsp;</span></span></strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-ccp-props="{}">&nbsp;</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">THE ROLE:</span></strong><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">The focus of this role is to plan, build, and execute the verification of new and existing features for AMD&rsquo;s SERDES IP, resulting in no bugs in the final design.  &nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">THE PERSON:</span></strong></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">The ideal candidate should have a deep understanding of analog design and able to lead, attend and present at design review meetings with teams worldwide.</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">KEY RESPONSIBILITIES:</span></strong></p><ul style="margin-top: 0cm; margin-bottom: 0cm;" type="disc"><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Circuit design of wireline transceiver building blocks (PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer, etc.)</span></li><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Conduct peer reviews of circuit design&nbsp;and verification results</span></li><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Working with validation team to evaluate silicon results</span></li></ul><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">PREFERRED EXPERIENCE:</span></strong></p><ul style="margin-top: 0cm; margin-bottom: 0cm;" type="disc"><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Extensive experience with high speed analog design with blocks like ADC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer.</span></li><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Experience with latest process technologies like 7nm or below FinFET technology.</span></li></ul><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">ACADEMIC CREDENTIALS:</span></strong></p><ul style="margin-top: 0cm; margin-bottom: 0cm;" type="disc"><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Bachelors/Masters/Phd Degree in Electronic Engineering</span></li></ul><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">LOCATION:</span></strong></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Singapore</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;">&nbsp;</p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">#LI-JK1</span></p><p style="margin: 0px; text-align: justify;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif; color: #000000;"><span style="margin: 0px; padding: 0px;" data-ccp-props="{}">#LI-Hybrid</span></span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described:&nbsp; </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.&nbsp;&nbsp; We encourage applications from all qualified candidates and will accommodate applicants&rsquo; needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.&nbsp; AMD&rsquo;s &ldquo;Responsible AI Policy&rdquo; is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">&nbsp;</span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p><h2>Responsibilities</h2><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">THE ROLE:</span></strong><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">The focus of this role is to plan, build, and execute the verification of new and existing features for AMD&rsquo;s SERDES IP, resulting in no bugs in the final design.  &nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">THE PERSON:</span></strong></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">The ideal candidate should have a deep understanding of analog design and able to lead, attend and present at design review meetings with teams worldwide.</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">KEY RESPONSIBILITIES:</span></strong></p><ul style="margin-top: 0cm; margin-bottom: 0cm;" type="disc"><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Circuit design of wireline transceiver building blocks (PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer, etc.)</span></li><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Conduct peer reviews of circuit design&nbsp;and verification results</span></li><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Working with validation team to evaluate silicon results</span></li></ul><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">PREFERRED EXPERIENCE:</span></strong></p><ul style="margin-top: 0cm; margin-bottom: 0cm;" type="disc"><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Extensive experience with high speed analog design with blocks like ADC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer.</span></li><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Experience with latest process technologies like 7nm or below FinFET technology.</span></li></ul><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">ACADEMIC CREDENTIALS:</span></strong></p><ul style="margin-top: 0cm; margin-bottom: 0cm;" type="disc"><li style="margin-top: 0cm; margin-right: 0cm; margin-bottom: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Bachelors/Masters/Phd Degree in Electronic Engineering</span></li></ul><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">&nbsp;</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">LOCATION:</span></strong></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Singapore</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;">&nbsp;</p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">#LI-JK1</span></p><p style="margin: 0px; text-align: justify;"><span style="font-size: 12pt; font-family: arial, helvetica, sans-serif; color: #000000;"><span style="margin: 0px; padding: 0px;" data-ccp-props="{}">#LI-Hybrid</span></span></p><h2>Qualifications</h2><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described:&nbsp; </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.&nbsp;&nbsp; We encourage applications from all qualified candidates and will accommodate applicants&rsquo; needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;">&nbsp;</span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.&nbsp; AMD&rsquo;s &ldquo;Responsible AI Policy&rdquo; is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">&nbsp;</span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>