Location
Singapore, Singapore
Department
{'name': 'Engineering'}
Posted
4w ago
Apply Now
Opens AMD's careers page · Last scraped 4 Jun 2026
Job Description
<strong class="jdheading"></strong><br><br><p style="margin: 0px; padding: 0px; color: windowtext;"><strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">WHAT YOU DO AT AMD CHANGES EVERYTHING</span></span></strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-ccp-props="{}"> </span></p><p style="margin: 0px; padding: 0px; color: windowtext;"><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, </span><span style="margin: 0px; padding: 0px;">gaming</span><span style="margin: 0px; padding: 0px;"> and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human </span><span style="margin: 0px; padding: 0px; border-bottom: 1px solid transparent;">ingenuity</span><span style="margin: 0px; padding: 0px;"> and a shared passion to create something extraordinary. When you join AMD, </span><span style="margin: 0px; padding: 0px;">you’ll</span><span style="margin: 0px; padding: 0px;"> discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.</span><span style="margin: 0px; padding: 0px;"> </span></span><strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-contrast="auto"><span style="margin: 0px; padding: 0px;">Together, we advance your career. </span></span></strong><span style="margin: 0px; padding: 0px; font-size: 12pt; font-family: Arial, Arial_EmbeddedFont, Arial_MSCustomFont, Arial_MSFontService, sans-serif;" data-ccp-props="{}"> </span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">THE ROLE:</span></strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">The Technical Lead is responsible for the test solution for a next-generation AMD Products. This position serves as the Test Engineering team's Technical Leader and go-to expert for solutions. This position requires engagement with Product, Design, Platform Engineering, Device Analysis, Foundry, Quality and Reliability Engineering to drive test and characterization plan, 1st silicon bring-up, silicon debug, attainment and optimization of yield and performance distributions, test costs and product quality for next-generation AMD products.</span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">This role offers opportunities for <strong>experienced Engineers who are interested in growing their technical scope over time</strong>, based on individual performance and business needs.</span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">THE PERSON:</span></strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">We are looking for one with a passion for technical development, possessing broad technical leadership, critical problem solving and troubleshooting skills. The person must be a team player and have good and effective communications to deep dive into technical discussion with other members across the globe and use data to illustrate their points. This person is expected to be independent, self-starter, well organized and have the sense of responsibility to see projects through beginning to the end as well as the ability to lead by influence. This person is expected to be market savvy and comfortable in a multi-tasking environment.</span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">New Product Introduction (NPI)</span></strong></span><ul><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Define and drive pre silicon test and characterization strategies for complex SoC products.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Establish DFT and pattern requirements, and work with Design and Verification teams to ensure test readiness prior to first silicon.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Lead first silicon bring up, silicon debug, and characterization execution across PVT corners.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Analyze yield, performance distributions, and device failures; lead root cause analysis and drive corrective actions across global teams.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Perform circuit sensitivity analysis, interpret findings, and guide deep dive investigations to resolution.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Drive innovation in SoC test, debug, DFT, and test methodology, translating ideas into production ready solutions.</span></li></ul></li><li><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">Production & Cost Optimization</span></strong></span><ul><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Own test content optimization to meet product quality and cost targets.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Drive yield, test time, and margin improvements from wafer sort through backend test.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Partner with manufacturing and quality teams to ensure stable, scalable production.</span></li></ul></li></ul><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;"> </span></strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">Technical</span></strong></span><ul><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Strong hands-on experience supporting <strong>complex SoC products (e.g., mobile or automotive processing units)</strong>.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Proven technical leadership across at least one full SoC product lifecycle (pre silicon to production). </span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Deep expertise in <strong>DFT and ATE test methodologies</strong>, spanning areas like <strong>ATPG Scan, MBIST, Functional, and High‑Speed IO testing</strong> across complex SoC environments.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Strong experience with Advantest 93k/Teradyne test platforms. </span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Solid understanding of CPU / GPU / SoC architectures with system level interactions as a plus. </span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Strong programming or scripting skills (Python, C/C++, Perl, Java). </span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Experience with industry EDA tools (Mentor, Synopsys, Cadence) is a plus.</span></li></ul></li><li><strong style="font-size: 12pt;"><span style="font-family: Arial, sans-serif;">Leadership</span></strong><ul><li><span style="font-size: 12pt;"><span style="font-family: Arial, sans-serif;">Demonstrated ability to act as a technical decision</span><span style="font-family: 'Cambria Math', serif;">‑</span><span style="font-family: Arial, sans-serif;">maker and mentor within the test organization.</span></span></li><li><span style="font-size: 12pt;"><span style="font-family: Arial, sans-serif;">Strong communication skills to engage deeply with global, cross</span><span style="font-family: 'Cambria Math', serif;">‑</span><span style="font-family: Arial, sans-serif;">functional engineering teams.</span></span></li><li><span style="font-size: 12pt;"><span style="font-family: Arial, sans-serif;">Willingness and capability to take on broader ownership, including mentoring engineers and contributing to long</span><span style="font-family: 'Cambria Math', serif;">‑</span><span style="font-family: Arial, sans-serif;">term test strategy and team development.</span></span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Strong ability to lead by influence</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Ability to program manage and drive test schedules and deliverables</span></li></ul></li></ul><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">ACADEMIC CREDENTIALS:</span></strong></span></p><ul style="margin-top: 0in;"><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Bachelor/Master in Electrical/Electronic Engineering.</span></li></ul><p style="margin: 0px;"> </p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">LOCATION:</span></strong></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Singapore</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;"> </span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">#LI-TM3</span></p> <br><strong class="jdheading"></strong><br><br><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described: </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;"> </span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p><h2>Responsibilities</h2><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">THE ROLE:</span></strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">The Technical Lead is responsible for the test solution for a next-generation AMD Products. This position serves as the Test Engineering team's Technical Leader and go-to expert for solutions. This position requires engagement with Product, Design, Platform Engineering, Device Analysis, Foundry, Quality and Reliability Engineering to drive test and characterization plan, 1st silicon bring-up, silicon debug, attainment and optimization of yield and performance distributions, test costs and product quality for next-generation AMD products.</span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">This role offers opportunities for <strong>experienced Engineers who are interested in growing their technical scope over time</strong>, based on individual performance and business needs.</span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">THE PERSON:</span></strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;">We are looking for one with a passion for technical development, possessing broad technical leadership, critical problem solving and troubleshooting skills. The person must be a team player and have good and effective communications to deep dive into technical discussion with other members across the globe and use data to illustrate their points. This person is expected to be independent, self-starter, well organized and have the sense of responsibility to see projects through beginning to the end as well as the ability to lead by influence. This person is expected to be market savvy and comfortable in a multi-tasking environment.</span></p><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">New Product Introduction (NPI)</span></strong></span><ul><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Define and drive pre silicon test and characterization strategies for complex SoC products.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Establish DFT and pattern requirements, and work with Design and Verification teams to ensure test readiness prior to first silicon.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Lead first silicon bring up, silicon debug, and characterization execution across PVT corners.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Analyze yield, performance distributions, and device failures; lead root cause analysis and drive corrective actions across global teams.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Perform circuit sensitivity analysis, interpret findings, and guide deep dive investigations to resolution.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Drive innovation in SoC test, debug, DFT, and test methodology, translating ideas into production ready solutions.</span></li></ul></li><li><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">Production & Cost Optimization</span></strong></span><ul><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Own test content optimization to meet product quality and cost targets.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Drive yield, test time, and margin improvements from wafer sort through backend test.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Partner with manufacturing and quality teams to ensure stable, scalable production.</span></li></ul></li></ul><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;"> </span></strong></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">Technical</span></strong></span><ul><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Strong hands-on experience supporting <strong>complex SoC products (e.g., mobile or automotive processing units)</strong>.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Proven technical leadership across at least one full SoC product lifecycle (pre silicon to production). </span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Deep expertise in <strong>DFT and ATE test methodologies</strong>, spanning areas like <strong>ATPG Scan, MBIST, Functional, and High‑Speed IO testing</strong> across complex SoC environments.</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Strong experience with Advantest 93k/Teradyne test platforms. </span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Solid understanding of CPU / GPU / SoC architectures with system level interactions as a plus. </span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Strong programming or scripting skills (Python, C/C++, Perl, Java). </span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Experience with industry EDA tools (Mentor, Synopsys, Cadence) is a plus.</span></li></ul></li><li><strong style="font-size: 12pt;"><span style="font-family: Arial, sans-serif;">Leadership</span></strong><ul><li><span style="font-size: 12pt;"><span style="font-family: Arial, sans-serif;">Demonstrated ability to act as a technical decision</span><span style="font-family: 'Cambria Math', serif;">‑</span><span style="font-family: Arial, sans-serif;">maker and mentor within the test organization.</span></span></li><li><span style="font-size: 12pt;"><span style="font-family: Arial, sans-serif;">Strong communication skills to engage deeply with global, cross</span><span style="font-family: 'Cambria Math', serif;">‑</span><span style="font-family: Arial, sans-serif;">functional engineering teams.</span></span></li><li><span style="font-size: 12pt;"><span style="font-family: Arial, sans-serif;">Willingness and capability to take on broader ownership, including mentoring engineers and contributing to long</span><span style="font-family: 'Cambria Math', serif;">‑</span><span style="font-family: Arial, sans-serif;">term test strategy and team development.</span></span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Strong ability to lead by influence</span></li><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Ability to program manage and drive test schedules and deliverables</span></li></ul></li></ul><p style="margin: 0px;"><span style="font-size: 12pt; font-family: Arial, sans-serif;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><strong><span style="font-family: Arial, sans-serif;">ACADEMIC CREDENTIALS:</span></strong></span></p><ul style="margin-top: 0in;"><li><span style="font-size: 12pt; font-family: Arial, sans-serif;">Bachelor/Master in Electrical/Electronic Engineering.</span></li></ul><p style="margin: 0px;"> </p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><strong><span style="font-family: Arial, sans-serif;">LOCATION:</span></strong></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">Singapore</span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;"> </span></p><p style="margin: 0cm; font-size: 12pt; font-family: Aptos, sans-serif;"><span style="font-family: Arial, sans-serif;">#LI-TM3</span></p><h2>Qualifications</h2><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">Benefits offered are described: </span></em><span style="font-family: 'Arial',sans-serif; color: black;"><a href="https://www.amd.com/en/corporate/careers/benefits.html" target="_blank" rel="noopener">AMD benefits at a glance</a>.</span></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></span></p><p style="margin: 0px;"><span style="color: black; font-size: 12pt;"> </span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available <a href="https://www.amd.com/en/legal/responsible-ai-use-policy.html" target="_blank" rel="noopener">here.</a></span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;"> </span></em></span></p><p style="margin: 0px;"><span style="font-size: 12pt;"><em><span style="font-family: 'Arial',sans-serif; color: black;">This posting is for an existing vacancy.</span></em></span></p>